MAX2058EVKIT【PDF 12/15 页】EVAL KIT FOR MAX2058

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700MHz to 1200MHz High-Linearity,

SPI-Controlled DVGA with Integrated Loopback Mixer

Detailed Description

The MAX2058 high-linearity DVGA consists of two 5-bit,

31dB digital attenuators, a fixed-gain two-stage driver

amplifier, a loopback mixer, and a serial interface to

control the attenuators. This high level of component

integration makes the MAX2058 ideal for base-station

transmitter applications. The MAX2058 is designed to

operate in the 700MHz to 1200MHz frequency ranges.

The overall cascaded performance of the MAX2058

produces a typical 10.5dB gain, a +32.3dBm OIP3, a

19dBm OP1dB, and a total 62dB gain-control range.

5-Bit Attenuators

The MAX2058 integrates two 5-bit digital attenuators to

achieve a high dynamic range. Each attenuator has a

31dB control range, a 1dB step size, and is pro-

grammed with the 3-wire SPI. See the Applications

Information section and Table 1 for attenuator program-

ming details. The attenuators can be used for both stat-

ic and dynamic power control.

Table 1. Attenuator Programming

Driver Amplifier

The MAX2058 includes a two-stage medium power

amplifier with a fixed 17.5dB gain. The driver amplifier

circuit is optimized for high linearity and medium output

power capability for the 800MHz to 1000MHz frequen-

cy range. The driver amplifier is intended to amplify a

modulated signal and drive a high-power amplifier in

base-station transmitters. In a typical application, the

driver amplifier is cascaded in between the two digital

attenuators. See the Typical Application Circuit.

The two-stage amplifier stage can be disabled for

applications where only the digital attenuators and/or

loopback mixer are used. To disable the two-stage

amplifier, ground or leave unconnected the amplifier

supplies VCCBIAS2, VCCAMP, VCCBIAS1, and also

the inputs for setting the amplifier bias currents RSET1,

RSET2. This reduces the supply current by approxi-

mately 132mA under typical conditions.

Loopback Mixer

The MAX2058 loopback mixer uses a double-balanced

active architecture designed to operate with a 700MHz

to 1200MHz RF frequency range, and a 40MHz to

100MHz LO frequency range. The RF port of the mixer is

ATTENUATOR A (5 MSBs)

Bit 9 = 16dB step

Bit 8 = 8dB step

Bit 7 = 4dB step

Bit 6 = 2dB step

Bit 5 = 1dB step

ATTENUATOR B (5 LSBs)

Bit 4 = 16dB step

Bit 3 = 8dB step

Bit 2 = 4dB step

Bit 1 = 2dB step

Bit 0 = 1dB step

connected internally (with an on-chip switch) to the input

of the first attenuator stage. The mixer ’s IF port is

matched for a single-ended 50 Ω impedance, while the

LO port requires a differential input impedance of 100 Ω .

The loopback mixer facilitates a self-diagnostic mode

for cellular transceivers, whereby the Tx band signal at

the input of the mixer can be translated up or down to

the corresponding Rx band. This translated signal can

then be fed back to the radio’s receiver for complete

Tx/Rx loop diagnostics. The loopback mixer is enabled

and disabled with LB_EN. Set LB_EN to a logic-low 0 to

DATA MSB

BIT 9

BIT 8

BIT 1

BIT 0

LSB

enable the mixer, set LB_EN to a logic-high 1 to disable

the mixer.

Applications Information

CLOCK

t CS

t CH

t CW

SPI Interface and Attenuator Settings

CS

The two 5-bit attenuators are programmed with the 3-

wire SPI/MICROWIRE-compatible serial interface using

t EWN

t ES

10-bit words. Bit 9 of the 10-bit data is shifted in first,

along with all remaining data bits, on the rising edge of

NOTES:

DATA ENTERED ON CLOCK RISING EDGE.

ATTENUATOR STATE CHANGE ON CS RISING EDGE.

Figure 1. SPI Timing Diagram

t EW

the clock regardless of CS being high or low. Once all

the data bits are shifted in, all will be sent to the attenua-

tors on the rising edge of CS , thus changing the attenua-

tion state. For standard SPI operation, pull CS low for the

duration of a valid 10-bit data set (t EWN ). This CS nega-

tive pulse width includes the setup time of the rising

clock edge to CS transitioning high (t ES ). See Figure 1.

12

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